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[Arm] DRAM memory flickering - Knowledgebase / FAQs by core architecture / Arm - Lauterbach Support

[Arm] DRAM memory flickering

Most probably, the DRAM controller is not optimally set. The timing may be tight so that the problem occurs with certain external events. In case the DRAM is not soldered, the issue could be due to a contact problem. Moreover, the problem could depend on the temperature. Another possibility is that the memory bus is operated over its limit.

Please note that the debugger memory access could cause a memory flickering in some rare cases (see below), however the whole memory will flicker in these cases and not only some memory cells:

  • Core clock and JTAG clock not synchronous. The solution here is to decrease the JTAG clock (e.g. SYStem.JtagClock 50Khz) or use SYStem.JtagClock RTCK if available.
  • The debugger memory access uses burst access. Some chips however do not allow such accesses. You can disable burst access with the command SYStem.Option MULTIPLEFIX ON
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