The RDY- signal is a CPU-output-signal which informs TRACE32 when the CPU can accept the next JTAG command. The CPU informs the debugger that it is "READY" for execution of the next command. If SYStem.Option.RDYLINE is OFF, TRACE32 gets the "ready-status" by polling a CPU debug register. This polling-sequence is slower than reading the RDY- signal directly. The performance loss is around 10%. There are no restrictions on debug functionality, all can be done with and without RDY- line.