The RISC-V ISA specification defines certain standard ISA extensions, which can complement a base ISA set with certain additional instructions (e.g. the "A" extension for atomic instructions).

Our RISC-V debugger supports all standard ISA extensions that are defined in the RISC-V ISA specification. This includes support by our disassembler and instruction set simulator. For certain special extensions such as floating point extensions ("F"), our RISC-V debugger can display the content of additional floating point registers and modify their values. Our support covers any valid combination of these standard ISA extensions.