The 8-bit Standby controller (SCR) subsystem constitutes an XC800 core, 8 KB of XRAM memory, and other modules that perform autonomous tasks while the main SoC remains in Idle, Sleep, or Standby modes, ensuring minimal power consumption overhead.

There are two supported methods to debug the SCR module:

Debug via Main SoC Debug Interface

• Requires that the TriCore is running throughout the whole debug session.

• A single debugger can be used to debug both the TriCore and the SCR in parallel.

• Demo scripts to debug the XC800 via the main SoC interface are available in the TRACE32 demo directory:

~~\demo\i51\hardware\<chip_family>_scr\soc

Debug via SCR Private DAP/SPD Interface

• Allows to debugging of the SCR while the main SoC is in Standby modes.

• Requires two debuggers:

  • One debugger connected to the TriCore via the main SoC debug connector.

  • A second debugger connected to the SCR via its private DAP/SPD connector.

• Demo scripts for debugging the XC800 via the SCR private interface are available in the TRACE32 demo directory:

~~\demo\i51\hardware\<chip_family>_scr\scr