This FAQ applies to you, if your TriCore chip and your TriCore debug cable support DAP and JTAG.

• All TriCore debug cables with a grey ribbon cable support DAP and JTAG. TriCore debug cables with a blue ribbon cable only support JTAG. See the Application Note Debug Cable TriCore for details.
• All TriCore AUDO-Future chips (TC1797, TC1767) and newer , as well as all AURIX chips (e.g. TC2xx, TC3xx) support DAP and JTAG. See the Infineon documentation of your TriCore chip for details.

For all target boards, where only one chip is connected to the debug port, DAP is the preferred debug port type:

• Due to the CRC, the communication is way more robust, and transmission errors can be detected by the chip as well as by the debugger. 
• Target resets can be detected much more reliable. 
• The protocol overhead does not affect debug performance. 
• On TriCore AURIX, with DAP much higher debug port clocks are possible, new DAP telegrams allow a more efficient communication. Thus, huge data transfers from and to the target device are much faster. Although this not relevant for the debug performance, a faster communication speeds up reading huge onchip trace buffers.
• For DAP Streaming via CombiProbe, the debug port type DAPWide or DAP4 with 160 MHz DAP clock is mandatory. See CombiProbe 2 for TriCore DAP for more information.

If more than one chip is connected to the debug port (so-called daisy-chaning), JTAG is mandatory. Please note that in this case, only one TriCore chip is allowed in the chain, and the TriCore chip must be the first device in the chain. Contact Lauterbach support to avoid creating a system that is bricked by design.