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Status Bar shows "runing (No CPU)" - Community / Debugging - Lauterbach Support

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Status Bar shows "runing (No CPU)"

Hi, experts
I have a cortex-a55 board with quad cores(smp), and when attach
the board, T32 cannot debug cores and shows running (no cpu).
And the message area window says:
"
core inactive
Device is disabled (CSW.DeviceEn = 0). Waiting for device ...
Unlock of debug registers via EDLAR failed. EDLAR is inaccessible
"
And I don't need reset the board and just want to attach to the target,
and then break/go(because the cpu will go into a while loop).
Please give some advice, thanks a lot. Attachment is my cmm.
Br,
Yingchun

Comments (9)

Khaled Jmal
Hello,
please refer to the following link for a description of the status "running (no CPU)": https://support.lauterbach.com/kb/articles/arm-what-is-the-meaning-of-the-state-displays-between-after-running

You need to check if the core is powered down.
yingchun li
Thanks for your comments!
I am running a test program, and all the 4 cores go into a while-loop, and the cores
must not be powered down. and I also tried to switch to another debugger, ARM's Dstream,
and that debugger find all cores, and can cannect the cores automatically. step/breaks seems okay.
So it seems there are some setting I didn't get them right.
The DAP seems okay(copied from system.detect.dap):

+- DAP |version: DPv3 | |
+- ROMTABLE (class 0x1) |base: DP:0x00000000 | |
+- APB4 MEM-AP |idr: 0x34770006 |^_+ SYStem.CONFIG APBAP1.Base DP:0x00040000 |
| +- ROMTABLE (class 0x1) |base: APB:0x00000000 | |
| +--=TPIU (SoC-600) |base: APB:0x00010000 |^_+ SYStem.CONFIG.TPIU.Base APB:0x00010000 |
| +--=TSGEN (SoC-600) |base: APB:0x00020000 | |
| +--=ETR/ETS (SoC-600) |base: APB:0x00030000 |^_+ SYStem.CONFIG.ETR.Base APB:0x00030000 |
| +--=CTI (SoC-600) |base: APB:0x00040000 |^_+ SYStem.CONFIG.CTI.Base APB:0x00040000 |
| +--=REPLICATOR (SoC-600) |base: APB:0x00050000 | |
| +--=FUNNEL (SoC-600) |base: APB:0x00060000 |^_+ SYStem.CONFIG.FUNNEL.Base APB:0x00060000 |
| +- ROMTABLE (FCM) | | |
| +--=DEBUG (Cortex-A55) |base: APB:0x01010000 |^_+ SYStem.CONFIG.COREDEBUG.Base APB:0x01010000 |
| +--=CTI (Cortex-A55) |base: APB:0x01020000 |^_+ SYStem.CONFIG.CTI.Base APB:0x01020000 |
| +--=PMU (Cortex-A55) |base: APB:0x01030000 |^_+ SYStem.CONFIG.BMC.Base APB:0x01030000 |
| +--=ETM (Cortex-A55) |base: APB:0x01040000 |^_+ SYStem.CONFIG.ETM.Base APB:0x01040000 |
| +--=DEBUG (Cortex-A55) |base: APB:0x01110000 |^_+ SYStem.CONFIG.COREDEBUG.Base APB:0x01110000 |
| +--=CTI (Cortex-A55) |base: APB:0x01120000 |^_+ SYStem.CONFIG.CTI.Base APB:0x01120000 |
| +--=PMU (Cortex-A55) |base: APB:0x01130000 |^_+ SYStem.CONFIG.BMC.Base APB:0x01130000 |
| +--=ETM (Cortex-A55) |base: APB:0x01140000 |^_+ SYStem.CONFIG.ETM.Base APB:0x01140000 |
| +--=DEBUG (Cortex-A55) |base: APB:0x01210000 |^_+ SYStem.CONFIG.COREDEBUG.Base APB:0x01210000 |
| +--=CTI (Cortex-A55) |base: APB:0x01220000 |^_+ SYStem.CONFIG.CTI.Base APB:0x01220000 |
| +--=PMU (Cortex-A55) |base: APB:0x01230000 |^_+ SYStem.CONFIG.BMC.Base APB:0x01230000 |
| +--=ETM (Cortex-A55) |base: APB:0x01240000 |^_+ SYStem.CONFIG.ETM.Base APB:0x01240000 |
| +--=DEBUG (Cortex-A55) |base: APB:0x01310000 |^_+ SYStem.CONFIG.COREDEBUG.Base APB:0x01310000 |
| +--=CTI (Cortex-A55) |base: APB:0x01320000 |^_+ SYStem.CONFIG.CTI.Base APB:0x01320000 |
| +--=PMU (Cortex-A55) |base: APB:0x01330000 |^_+ SYStem.CONFIG.BMC.Base APB:0x01330000 |
| +--=ETM (Cortex-A55) |base: APB:0x01340000 |^_+ SYStem.CONFIG.ETM.Base APB:0x01340000 |
+--=APBCOM (SDC-600) |base: DP:0x00050000 | |
+--=AHB5 MEM-AP |idr: 0x44770008 |^_+ SYStem.CONFIG AHBAP1.Base DP:0x00060000
Khaled Jmal
Hi,
I created a ticket based on your post. My colleagues will get in touch with you shortly. You can check the status of your ticket here: https://support.lauterbach.com/tickets
Regards,
Khaled
yingchun li
Hi, Khaled
I really appreciate it, if you need more info, please let me know.
Yingchun
yingchun li
Hi, Khaled
Finally the T32 connect to the target, now it can debug all 4 cores.
I have to set the command "SYStem.CONFIG APBAP1.Base DP:0x00040000". this is
the critical command I didn't set.
What I don't understand is T32 has decovered all these setting(by system.dected.dap),
why need I still to set these manually? can it do some automatical probe according DAP scanning?
Thanks you for your suport.
Br,
Yingchun
Khaled Jmal
Hi Yingchun,
the DAP scanning does not work always mainly because of non-powered components that can crash the discovery. This is why we do not use automatic configuration based on the discovery. See also: https://support.lauterbach.com/kb/articles/arm-does-trace32-need-access-to-the-coresight-rom-table
Regards,
Khaled
yingchun li
Okay´╝îget it, but is it possible to provide an option(or cmm) to start an automatic
configuration? if that fails, then try to set manually.
Anyway, thanks a lot, now I can debug.
Br
Yingchun
Khaled Jmal
The detected topology generally contains several cores. We cannot know which cores the user wants to debug. This becomes more difficult with trace, where it is not always possible to identify all components pro SMP cluster.
You can still in the SYStem.DETECT DAP window select single components then do a right mouse click and select "Copy marked commands to clipboad" (see attachment). This option does not however support SMP configurations. Moreover, components with an index, like APs will always get with this option the default index (1 or no index).
yingchun li
>>We cannot know which cores the user wants to debug.
With ARM's Dstream, it always start core 1.
>>You can still in the SYStem.DETECT DAP window select single components then do a right >>mouse click and select "Copy marked commands to clipboad" (see attachment).
Okay, have found it , that's very convienent,thanks!

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