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Trace support for PolarFire® SoC (RISC-V + FPGA) - Knowledgebase / FAQs by core architecture / RISC-V - Lauterbach Support

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Trace support for PolarFire® SoC (RISC-V + FPGA)

  • Last updated: Feb 13, 2025 by Lauterbach

Please refer to https://gitlab.com/lauterbach/polarfire_trace. The repository contains resources to implement off-chip trace of the hard RISC-V cores of a PolarFire® SoC with Lauterbach tools.


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This Article Category Knowledgebase
Date Created
Feb 13, 2025