With the RISC-V standards now finalized, many semiconductor manufacturers are working diligently to implement RISC-V trace IP in their chips. TRACE32 debug and trace tools are widely used to configure and validate the functionality of the trace infrastructure. To ensure a fast and reliable process, Lauterbach has now published detailed documentation on its RISC-V trace support.
The documentation highlights block diagrams, setup sequences, and a comprehensive explanation of the commands. Since the trace infrastructure is identical for the Nexus and E-Trace protocols, tool support is streamlined, enabling consistent and clear documentation.
You can download the latest documentation from https://repo.lauterbach.com/pdfnew/debugger_riscv.pdf.
Minimum software : 175187 or TRACE32 Release 02/2025; since much of the technology is brand new, it is recommended to request a software update from Lauterbach Support.
Supported core architecture: RISC-V 32bit/64bit
If you require assistance or need to contact our support team, please visit the following link to submit a request: Lauterbach Support
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